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MC10EL52, MC100EL52 5V ECL Differential Data and Clock D Flip-Flop
Description
The MC10EL/100EL52 is a differential data, differential clock D flip-flop with reset. The device is functionally equivalent to the E452 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E452, the EL52 is ideally suited for those applications which require the ultimate in AC performance. Data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The differential clock inputs of the EL52 allow the device to also be used as a negative edge triggered device. The EL52 employs input clamping circuitry so that under open input conditions (pulled down to VEE) the outputs of the device will remain stable. The 100 Series contains temperature compensation.
Features
http://onsemi.com MARKING DIAGRAMS*
8 1 SOIC-8 D SUFFIX CASE 751 8 1 TSSOP-8 DT SUFFIX CASE 948R 8 HEL52 ALYW G 1 1 8 KEL52 ALYW G
8 HL52 ALYWG G
8 KL52 ALYWG G
> 100 V Machine Model
* PECL Mode Operating Range: VCC = 4.2 V to 5.7 V * * * * * * *
with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = -4.2 V to -5.7 V Internal Input Pulldown Resistors on D and CLK Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D Flammability Rating: UL 94 V-0 @ 0.125 in, Oxygen: Index 28 to 34 Transistor Count = 48 devices Pb-Free Packages are Available
1 DFN8 MN SUFFIX CASE 506AA H = MC10 K = MC100 4Y = MC10 2N = MC100 A = Assembly Location L Y W M G
4
1
= Wafer Lot = Year = Work Week = Date Code = Pb-Free Package
(Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2006
December, 2006 - Rev. 5
1
Publication Order Number: MC10EL52/D
2N M G G 4
4Y M G G
* 365 ps Propagation Delay * 2.0 GHz Toggle Frequency * ESD Protection: > 1 kV Human Body Model,
1
1
MC10EL52, MC100EL52
Table 1. TRUTH TABLE
D1 D
8
VCC Q
D* L H
CLK* Z Z
Q L H
D
2
7
Z = LOW to HIGH Transition * Pin will default low when left open.
CLK
3
6
Q
Table 2. PIN DESCRIPTION
PIN D, D CLK, CLK Q, Q VCC VEE EP FUNCTION ECL Data Input ECL Clock Input ECL Data Output Positive Supply Negative Supply Exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply or leave floating open.
CLK
4
5
VEE
Figure 1. Logic Diagram and Pinout Assignment
Table 3. MAXIMUM RATINGS
Symbol VCC VEE VI Iout TA Tstg qJA qJC qJA qJC Tsol Parameter PECL Mode Power Supply NECL Mode Power Supply PECL Mode Input Voltage NECL Mode Input Voltage Output Current Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder Pb Pb-Free 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm Standard Board <2 to 3 sec @ 248C <2 to 3 sec @ 260C 8 SOIC 8 SOIC 8 SOIC 8 TSSOP 8 TSSOP 8 TSSOP Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V Continuous Surge VI VCC VI VEE Condition 2 Rating 8 -8 6 -6 50 100 -40 to +85 -65 to +150 190 130 41 to 44 185 140 41 to 44 5% 265 265 Unit V V V V mA mA C C C/W C/W C/W C/W C/W C/W C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
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MC10EL52, MC100EL52
Table 4. 10EL SERIES PECL DC CHARACTERISTICS VCC = 5.0 V; VEE = 0 V (Note 1)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 5) Output LOW Voltage (Note 2) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) D CLK Input HIGH Current Input LOW Current 0.5 3920 3050 3770 3050 3.4 2.5 Min Typ 21 4010 3200 Max 25 4110 3350 4110 3500 4.6 4.4 150 0.5 4020 3050 3870 3050 3.4 2.5 Min 25C Typ 21 4105 3210 Max 25 4190 3370 4190 3520 4.6 4.4 150 0.3 4090 3050 3940 3050 3.4 2.5 Min 85C Typ 21 4185 3227 Max 25 4280 3405 4280 3555 4.6 4.4 150 mA mA Unit mA mV mV mV mV V
IIH IIL
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.25 V / -0.5 V for +25C and +85C. or VEE can vary +0.06 V / -0.5 V for -40C. 2. Outputs are terminated through a 50 ohm resistor to VCC - 2.0 V. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V.
Table 5. 10EL SERIES NECL DC CHARACTERISTICS VCC = 0 V; VEE = -5.0 V (Note 4)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 5) Output LOW Voltage (Note 5) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) D CLK Input HIGH Current Input LOW Current 0.5 -1080 -1950 -1230 -1950 -1.6 -2.5 Min Typ 21 -990 -1800 Max 25 -890 -1650 -890 -1500 -0.4 -0.6 150 0.5 -980 -1950 -1130 -1950 -1.6 -2.5 Min 25C Typ 21 -895 -1790 Max 25 -810 -1630 -810 -1480 -0.4 -0.6 150 0.3 -910 -1950 -1060 -1950 -1.6 -2.5 Min 85C Typ 21 -815 -1773 Max 25 -720 -1595 -720 -1445 -0.4 -0.6 150 mA mA Unit mA mV mV mV mV V
IIH IIL
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. Input and output parameters vary 1:1 with VCC. VEE can vary +0.25 V / -0.5 V for +25C and +85C. or VEE can vary +0.06 V / -0.5 V for -40C. 5. Outputs are terminated through a 50 ohm resistor to VCC - 2.0 V. 6. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V.
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MC10EL52, MC100EL52
Table 6. 100EL SERIES PECL DC CHARACTERISTICS VCC = 5.0 V; VEE = 0 V (Note 7)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 8) Output LOW Voltage (Note 8) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) D CLK Input HIGH Current Input LOW Current 0.5 3915 3170 3835 3190 2.6 2.5 Min Typ 21 3995 3305 Max 25 4120 3445 4120 3525 4.6 4.2 150 0.5 3975 3190 3835 3190 2.6 2.5 Min 25C Typ 21 4045 3295 Max 25 4120 3380 4120 3525 4.6 4.2 150 0.5 3975 3190 3835 3190 2.6 2.5 Min 85C Typ 24 4050 3295 Max 29 4120 3380 4120 3525 4.6 4.2 150 mA mA Unit mA mV mV mV mV V
IIH IIL
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 7. Input and output parameters vary 1:1 with VCC. VEE can vary +0.8 V / -0.5 V. 8. Outputs are terminated through a 50 ohm resistor to VCC - 2.0 V. 9. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V.
Table 7. 100EL SERIES NECL DC CHARACTERISTICS VCC = 0 V; VEE = -5.0 V (Note 10)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 11) Output LOW Voltage (Note 11) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) D CLK Input HIGH Current Input LOW Current 0.5 -1085 -1830 -1165 -1810 -2.4 -2.5 Min Typ 21 -1005 -1695 Max 25 -880 -1555 -880 -1475 -0.4 -0.8 150 0.5 -1025 -1810 -1165 -1810 -2.4 -2.5 Min 25C Typ 21 -955 -1705 Max 25 -880 -1620 -880 -1475 -0.4 -0.8 150 0.5 -1025 -1810 -1165 -1810 -2.4 -2.5 Min 85C Typ 24 -955 -1705 Max 29 -880 -1620 -880 -1475 -0.4 -0.8 150 mA mA Unit mA mV mV mV mV V
IIH IIL
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 10. Input and output parameters vary 1:1 with VCC. VEE can vary +0.8 V / -0.5 V. 11. Outputs are terminated through a 50 ohm resistor to VCC - 2.0 V. 12. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V.
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MC10EL52, MC100EL52
Table 8. AC CHARACTERISTICS VCC = 5.0 V; VEE = 0 V or VCC = 0 V; VEE = -5.0 V (Note 13)
-40C Symbol fmax tPLH tPHL tS tH tPW VPP tJITTER tr tf Characteristic Maximum Toggle Frequency Propagation Delay to Output CLK Setup Time Hold Time Minimum Pulse Width Input Swing (Note 14) Cycle-to-Cycle Jitter Output Rise/Fall Times Q (20% - 80%) 100 Min 1.8 225 125 150 400 150 TBD 225 350 100 1000 Typ 2.5 335 0 50 515 Max Min 2.2 275 125 150 400 150 TBD 225 350 100 1000 25C Typ 2.8 365 0 50 465 Max Min 2.2 320 125 150 400 150 TBD 225 350 1000 85C Typ 2.8 410 0 50 510 Max Unit GHz ps ps ps ps mV ps ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 13. 10 Series: VEE can vary +0.25 V / -0.5 V for +25C and +85C. or VEE can vary +0.06 V / -0.5 V for -40C 100 Series: VEE can vary +0.8 V / -0.5 V. 14. VPP(min) is minimum input swing for which AC parameters guaranteed. The device has a DC gain of 40.
Q Driver Device Q
Zo = 50 W
D Receiver Device
Zo = 50 W 50 W 50 W
D
VTT VTT = VCC - 3.0 V
Figure 2. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.)
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MC10EL52, MC100EL52
ORDERING INFORMATION
Device MC10EL52D MC10EL52DG MC10EL52DR2 MC10EL52DR2G MC10EL52DT MC10EL52DTG MC10EL52DTR2 MC10EL52DTR2G MC10EL52MNR4 MC10EL52MNR4G MC100EL52D MC100EL52DG MC100EL52DR2 MC100EL52DR2G MC100EL52DT MC100EL52DTG MC100EL52DTR2 MC100EL52DTR2G MC100EL52MNR4 MC100EL52MNR4G Package SOIC-8 SOIC-8 (Pb-Free) SOIC-8 SOIC-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) DFN8 DFN8 (Pb-Free) SOIC-8 SOIC-8 (Pb-Free) SOIC-8 SOIC-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) DFN8 DFN8 (Pb-Free) Shipping 98 Units / Rail 98 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 100 Units / Rail 100 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel 98 Units / Rail 98 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 100 Units / Rail 100 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
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MC10EL52, MC100EL52
PACKAGE DIMENSIONS
SOIC-8 NB CASE 751-07 ISSUE AH
-X-
A
8 5
B
1
S
4
0.25 (0.010)
M
Y
M
-Y- G
K
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
C -Z- H D 0.25 (0.010)
M SEATING PLANE
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT*
1.52 0.060
7.0 0.275
4.0 0.155
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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MC10EL52, MC100EL52
PACKAGE DIMENSIONS
TSSOP-8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R-02 ISSUE A
8x
K REF 0.10 (0.004)
M
0.15 (0.006) T U
S 2X
TU
S
V
S
L/2
8 1
5
L
PIN 1 IDENT
4
B -U-
0.25 (0.010) M
0.15 (0.006) T U
S
A -V-
F DETAIL E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_
C 0.10 (0.004) -T- SEATING
PLANE
D
G DETAIL E
-W-
DIM A B C D F G K L M
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MC10EL52, MC100EL52
PACKAGE DIMENSIONS
DFN8 CASE 506AA-01 ISSUE D
D A B
PIN ONE REFERENCE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 . 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 A3 b D D2 E E2 e K L MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.00 BSC 1.10 1.30 2.00 BSC 0.70 0.90 0.50 BSC 0.20 --- 0.25 0.35
E
2X
0.10 C
2X
0.10 C
0.10 C
8X
0.08 C
SEATING PLANE
A1
8X
L
K
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
CCCC CCCC CCCC CCCC
D2 e/2
1 8
TOP VIEW
A (A3) C e
4
SIDE VIEW
E2
5 8X
b
0.10 C A B 0.05 C
NOTE 3
BOTTOM VIEW
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MC10EL52/D

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